(1) Field of the Invention
The invention relates to the fabrication of integrated circuit devices, and more particularly, to a method of forming high quality contacts to device regions and to the formation of buried contacts in the fabrication of integrated circuits.
(2) Description of the Prior Art
High quality electrical contacts to transistor regions within a semiconductor substrate is a critical necessity for the submicron feature size era in the manufacture of integrated circuits. This is a particular problem wherein doped polycrystalline silicon (polysilicon) is used as the electrical contacting material. There are two possibilities of problem (1) the buried contact formation and contact therefor and (2) the electrical contact formation to an already formed region within the semiconductor substrate.
The first problem involves an implanted polysilicon gate that may result in imperfect device performance and in higher sheet resistance. Prior art processes for conventionally forming buried contacts use a doped polysilicon layer on a silicon substrate and the structure is heated to formed the diffused region in the silicon substrate. The doped polysilicon layer is allowed to remain upon the diffused layer to act as the contact to this diffused region. U.S. Pat. Nos. 4,830,972 and 5,030,584 describe such processes involving outdiffusion from doped polysilicon for forming buried contact diffused regions in a semiconductor substrate. U.S. Pat. No. 5,049,514 to Mori shows a process of doping polysilicon, open metal silicide layer, ion implanting, and annealing to form the source/drain region.
The problem with this method is to achieve the desired junction depth and doping concentration in the buried junction. The drawbacks of the prior art processes are insufficient doping concentration at the polysilicon diffused region interface and high polysilicon resistance. The polysilicon cannot be too heavily doped because this would result in too deep a buried contact junction.
The second problem involves the contact to an already formed transistor device region, such as an N+ source/drain region. The normal polysilicon electrical contact for such a region in composed of a layer of doped polysilicon and a layer of a metal silicide. During the formation of this contact structure, the polysilicon is normally deposited undoped, metal silicide formed and doping of the polysilicon by ion implantation thereafter. The structure is now heated after the ion implantation. During this heating/annealing there is a deterioration of the electrical conductivity of the contact.